Binary 32-Bit Adder Design Using Carry Look Ahead Adder in Electric

Abstract

Adders are a part of integrated circuits of today almost everywhere. Smaller and lower-power arithmetic circuits are also required by the rapidly evolving computing industry, in addition to faster arithmetic units. To satisfy its needs, the adder needs to be both speedy and effective in the chip area. We used the Carry Look Ahead Adder (CLA) to build a 32-bit adder utilizing eight 4-bit adders for our project. Because it propagates carry before the sum output is reached, it takes less time than other adders and performs brilliantly, earning it the nickname "fast adders." We used LT Spice simulation to create the CLA's schematic and architecture. 45nm technology was used, with an area of 898.6 ?m² and a power efficiency of 0.215  watt.